High Voltage Power Supply - UltraVolt®

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AP-1

 
AP-1: Remote Control of UltraVolt HVPSs
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BASICS OF ULTRAVOLT HVPS OUTPUT VOLTAGE CONTROL

By varying the voltage at the Remote Adjust Input terminal (pin 6) between 0 and +5V, the UV high-voltage power supply (HVPS)'s output voltage can be adjusted. The output voltage can be varied over the full range from 0 to the maximum output voltage. By design, the maximum HVPS output voltage is 107.5% ± 2% of the HVPS's nominal output-voltage rating. For an HVPS of nominal voltage rating Eo:

HVPS Polarity
Remote Adjust Range
Output Voltage
+Eo (i.e. -P supply)
0 to +5V
0 to (1.075Eo)V
-Eo (i.e. -N supply)
+5V to 0
0 to (1.075Eo)V

Note that for a negative supply, a remote adjust input of 0V yields an output of 1.075Eo Volts, not 0V as with the positive supply.

Under no circumstances should the Remote Adjust Input of either a positive or negative HVPS be driven below 0V, since damage to the HVPS will occur. Should a bipolar DAC or Op Amp be used to control the remote adjust, the Remote Adjust Input must be protected from negative voltage. This can be accomplished simply by connecting a low-voltage Schottky diode between HVPS pins 5 and 6 (anode to pin 5, cathode to pin 6). For more information, see Application Note #16.

The gain from the Remote Adjust Input to the HVPS output can be found using:: ((Eo/5)1.075), with a typical tolerance of ± 1%. Again, Eo is the supply's nominal voltage rating. An initial offset of ± 1% may also be present.

For a 1kV unit,

gain
= (Eo / 5)(1.075) ± 1% = (1000V / 5)(1.075) ±1%
  = 215V ± 1%.

With a remote adjust input of 5V, the HVPS output would be 1075V.

UltraVolt power supplies can be controlled through two methods:

  1) Direct Voltage programming
  2) Resistive programming

As we review these two methods, refer to UV-CONN-1 (Voltage Programming of Remote Adjust with a Potentiometer, DAC or OP AMP) or to the illustration below:

Diagram

1) Voltage Programming

Voltage programming of the UltraVolt HVPS can be done by applying a controlled voltage to the Remote Adjust Input terminal (pin 6). A typical application of voltage programming is the adjustment of the HVPS's output voltage through the use of a computer-controlled DAC (digital-to-analog converter). Although this allows for extremely versatile control of the HVPS, designs using this method must compensate for the DAC resolution (the DAC output-voltage step per input-step increment). Should the need arise, a logarithmic DAC may have to be used to increase the resolution over a region of interest at the expense of the other ranges. Of course, the number of input bits to the DAC could also be increased to improve the resolution..

To avoid the need to generate a negative internal LVPS, the designers at UltraVolt used the internal +5VDC, temperature-compensated reference to create a summing junction with the negative HVPS feedback. This also had the advantage of keeping the remote programming voltage unipolar instead of bipolar. Therefore, it is important with a Remote Adjust Input of +5VDC to 0VDC representing 0 Eout to Max Eout that any programming source equals +5VDC or greater. This will guarantee the HVPS output goes to 0VDC.

If your remote-control circuit uses the +5VDC reference, care should be taken when using a control circuit such as a DAC that uses a reference other than the internal UltraVolt reference. Should the DAC reference be 5.000 volts and the internal UltraVolt reference be at 5.025 volts, then the DAC controls will yield a non-zero output. This may lead to a situation when 0 volts is expected from the power supply but is not attainable, since the DAC output could not be made to equal the 5V reference. This can be avoided by using the HVPS 5V reference output as the DAC reference voltage. If the DAC has an internal reference, an external pull-up can also be added to assure DAC voltages will slightly exceed 5.0V.

In a system with a dual-, quad-, or octal-type multiple DAC, a single voltage reference is used. By tying the +5 volt references of all the UltraVolt HVPSs together, an average Vref can be created.

Diagram

The UltraVolt high voltage power supply can also be programmed with a 0−10V DAC, Op Amp, or other control voltage using a resistive divider. For divider design purposes, the input impedance of the Remote Adjust Input terminal is 1MΩ. An example of a suitable divider for this application is as follows:


Diagram

If a circuit design utilizing a negative UltraVolt HVPS must have 0 to +5VDC control, an Op Amp inverter can be used, see UV-CONN-17 (Simple Remote Adjust Inverter for Negative HVPS) for a typical circuit.

2) Resistive Programming

Because of the high, 1MΩ, remote adjust impedance, the UltraVolt HVPS can also be adjusted through resistive programming. In this application, the +5V Reference Output (pin 7) of the HVPS is used. A resistive divider can be used to control the voltage at the Remote Adjust Input terminal and, hence, control the output voltage of the HVPS. Designs using the 5V reference must compensate for its 464Ω output impedance, and it should be remembered that this voltage is thermally compensated.

Many variations of resistive dividers are possible. Below are some example for HVPSs with nominal voltage rating Eo:

a) Output variable from 0V to approximately 1.075 times the rated voltage

For a positive HVPS (with a negative HVPS, the formulas change slightly),

Diagram

output 0V to Vmax for supply rated Eo volts,
Vmax depends upon the current flowing through
the 464Ω, 5V reference output resistance and
potentiometer value R.

So, through R, I = (5V) / (464Ω + R).

For Vmax, Vpin6 = 5 − (464Ω)(I). Therefore,

Vmax =
Eo(1.075)(Vpin6)/5
  =
 (1.075)(R)(Eo .
 
(464Ω) + R

The above configuration is the basic method for resistively programming the supply's output voltage. The value of the potentiometer must be much smaller than the input impedance of the Remote Adjust Input, which is 1MΩ. At the same time, the potentiometer's value must be chosen so it does not draw too much current from the 5V reference supply, keeping in mind its output impedance of 464Ω. As an example, a 10kΩ potentiometer will limit the maximum HVPS output voltage to 1.03 times the nominal rated voltage of the supply, due to its loading of the 5V reference. A range for the potentiometer of 25−100kΩ would essentially eliminate the voltage limiting previously mentioned.

For a 2kV unit with a 10kΩ potentiometer on the Remote Adjust Input terminal,

Diagram
output 0V to Vmax for supply rated 2000 volts,

Vmax =
 (1.075)(R)(Eo
 
(464Ω) + R
 
  =
 (1.075)(10kΩ)(2000V)
(464Ω) + (10kΩ)
  =  2055V.

So, with a 10kΩ pot, the 2kV HVPS output
voltage is variable from 0V to 2055V.

b) Output variable from 0 to a fixed voltage less than the maximum voltage

By adding a fixed resistor to the above basic configuration between the potentiometer and the reference 5V supply, a maximum voltage limit of less than the HVPS's maximum voltage can be obtained.

For a positive HVPS,

Diagram


output 0V to Vmax for supply rated 2000 volts,

0V to (
          R2          
)(Vout max) volts
R1 + R2 + 464Ω
Vout max = (1.075)(Eo).

 

The sum (R1 + R2) has to be much smaller than the input impedance of the Remote Adjust Input terminal (1MΩ) and large enough not to load down the 5V reference supply. For example, (R1 + R2) could be 50kΩ and satisfactory operation would result (with a maximum upper limit of 1.065 times the supply voltage rating).

For a −2kV (−Eo) unit with R2 = 100kΩ, and HVPS output voltage adjustable to −1500V, what is the value of R1? What is the minimum output voltage?

Diagram

With output up to −1500V and R2 = 100kΩ, find R1 for a −Eo unit. Vout for supply rated 2000 volts,

Vout =(1.075)(Eo)(
 (1 − Vpin6
).
5

So,
Vmax =(1.075)(Eo)(
    (R2 + 464Ω)    
).
(R1 + R2 + 464Ω)
 
Vmin =(1.075)(Eo)(
       (464Ω)      
).
(R1 + R2 + 464Ω)

with Vmax = -1.5kV, R2 = 100kΩ, and Eo = -2kV.

Therefore, R1 = 43kΩ, Vmin = −6.95V.

c) Output variable from a fixed voltage to the maximum voltage

By adding a fixed resistor between the potentiometer and the signal return of the basic configuration, a voltage minimum of >0 can be obtained.

For a positive HVPS,

Diagram
output
(
          R2         
)(Vout max)
(R1 + R2 + 464Ω)
to
(
      (R1 + R2)     
)(Vout max).
(R1 + R2 + 464Ω)
 

Note the maximum output voltage is not Vout max to the loading of the 5V reference source impedance (of 464Ω).

Again, the sum (R1 + R2) has to be much smaller than the input impedance of the Remote Adjust Input terminal and large enough not to draw too much current from the 5V reference supply. For example, (R1 + R2) could be 50kΩ and satisfactory operation will result (with the maximum power supply system output voltage being 1.065 times the rated HVPS voltage).

For a 2kV (+Eo) unit with R1 = 10kΩ, what is R2 when HVPS output voltage is 100V? What is the subsequent maximum HVPS output voltage?

Diagram

 

Output is 100V to (
       R1 + R2       
)(Vout max)
R1 + R2 + 464Ω
 
so 100 = (
          R2          
)(Vout max)
R1 + R2 + 464Ω
where Vout max = (2kV)(1.075)

With R1 = 10kΩ the above formula is satisfied
With R2 = 510kΩ and the maximum output is

(
      R1 + R2        
)(Vout max) = 2.06kV.
R1 + R2 + 464Ω
 

 

The configurations in b) and c) can be combined to form preset upper and lower boundaries for the adjustable range of the HVPS.

For a positive high voltage power supply,

Diagram
output is

(
              R3            
)(Vout max)
R1 + R2 + R3 +464Ω
to
(
           R2 + R3         
)(Vout max) volts.
R1 + R2 + R3 + 464Ω
 

 

Although these examples deal with either positive or negative power supplies, the same circuits and theory can be used to analyze and to design positive and negative power-supply control systems. Each application noted here can be used with both negative or positive supplies with a slight modification to the formula: the variable Vpin6 for positive supplies will be replaced by (5 − Vpin6) to yield the output of the negative supplies.

Reduction of 60Hz Pickup on the Remote Adjust Line

Certain applications of voltage control and resistive control of UltraVolt high-voltage power supplies will be susceptible to low-frequency pick-up from sources such as 60Hz power lines. Since 60Hz pick-up on the Remote Adjust Input terminal can adversely affect HVPS DC performance, it is recommended that a capacitor be placed from the Signal Ground Return terminal (pin 5) to the Remote Adjust Input terminal (pin 6) on a positive HVPS for slow rise time, DC bias, or DC power applications. For negative HVPSs, the capacitor should be between the +5VDC Reference Output (pin 7) and the Remote Adjust Input terminal (pin 6). A capacitor value of 0.47−1 µF will eliminate any 60Hz noise that would otherwise be picked up by the Remote Adjust Input terminal. A 22µF tantulum capacitor will further reduce low-frequency noise.

Use of the Bi-Functional Enable Terminal

Should the Enable/Disable terminal (pin 4) be left floating (i.e. not connected), the HVPS will stay in the enabled state. However, making use of the Enable/Disable terminal allows for the implementation of a few more built-in features of the UltraVolt HVPS.

The Enable/Disable terminal (pin 4) can be used for three different functions:

  1) an enable input
  2) a disable input
  3) a current limit status output

As we review these functions, please refer to UV-CONN-2 (Enable/Disable Control, also Current Limit Status).

1) Enable/Disable terminal as an enable input.

To allow the HVPS to be enabled only when an enable signal is present, the HVPS must be set up to be normally disabled (in the absence of an enable signal). To disable the HVPS, the Enable/Disable terminal must sink at least 1mA, and its resulting voltage must be a maximum of 0.7 ± 0.20V, a TTL low.

A method of allowing the HVPS to be remotely enabled only during the presence of a TTL high-level enable signal is shown below.

Diagram

The 330Ω resistor will ensure that with a low TTL Enable Output signal, the required 1mA will be drawn from the UltraVolt HVPS Enable/Disable terminal, thus forcing the HVPS to be in the disabled state. When the TTL Enable Output signal goes high, the high-voltage power supply is prevented from sinking the required current and, therefore, the HVPS is in the enabled state.

2) Enable/Disable terminal as a disable input.

The Enable/Disable terminal can also be configured as a disable input. In this configuration, the Enable/Disable terminal must be left high until the disable (a TTL low) signal is sent. Since this input normally floats high, disabling the HVPS can be done by sinking 1mA through the Enable/Disable terminal and, thus, pulling the Enable/Disable terminal voltage to 0.8V or lower, a TTL low.

A standard method of remotely disabling the HVPS during the presence of a TTL-low disable signal is shown below.

Diagram

The 15kΩ resistor will ensure the Enable/Disable terminal stays at a voltage level that will force the HVPS to remain enabled until the TTL Disable Output signal goes low. When the TTL Disable Output goes low, the high-voltage power supply is forced into the disabled state. It should be noted, the HVPS has an internal, 5.11kΩ pull-up to +5VDC.

3) Enable/Disable terminal as a current limit status output.

For this function to be utilized, it is very important that any logic driving the Enable/Disable terminal be either three-state or open collector output. Any voltage applied to this terminal (i.e. from enable/disable logic) will 'mask' the current-limit pulses. To sense the current-limit signal coming out of the Enable/Disable terminal, a resistor of 47−100kΩ must be placed from the Enable/Disable terminal to ground in order to sink sufficient current.

When the UltraVolt HVPS is forced into its current-limit mode, the voltage on the Enable/Disable terminal will drop from its pre-current-limit value of 5V to its current-limit value of 0.5V. After this point, the voltage at the terminal will again rise to 5V, when it will drop back to 0.5V should the power supply continue to be current limited. The on-time of this signal is inversely proportional to the overload placed on the high-voltage power supply (a very large load will cause the pulse train present at the Enable/Disable terminal to have a very short on-time).

a) L.E.D. current-limit status output

Diagram

The above schematic illustrates a very useful implementation of the current-limit status output. When the HVPS goes into current limit, pin 4 will go low, causing the transistor to turn 'off' and the L.E.D. to light. When the HVPS is not operating in current-limit mode, pin 4 will stay high and the transistor will turn 'on'. This will prevent the voltage across the L.E.D. from being high enough to allow it to light. Hence, the L.E.D. will indicate when the HVPS is operating in current-limit mode. This is a useful front-panel indicator, as well as being a very useful circuit when prototyping and diagnosing new designs incorporating UltraVolt high-voltage power supplies.

b) Logic-level current-limit status output

Diagram

The above circuit is a slight modification of the one in part a), operating in the same way, except when the L.E.D. is lit the TTL buffer is enabled. The 5.2V Zener diode serves to prevent any harmful transients from reaching the TTL buffer (or any other TTL logic gate). This circuit is ideal for automated systems.


Rev. J1

*** END OF APPLICATION NOTE #1 ***